IR22771STRPBF【PDF 15/16 页】IC CURRENT SENSE 16SOIC

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Sheet目录40

11页 12页 13页 14页 [15页]16页

IR22771S/IR21771S(PbF)

www.irf.com

c) Bootstrap Capacitor

For high T

HON

designs where is used an electrolytic

tank capacitor, its ESR must be considered. This

parasitic resistance develops a voltage divider with

boot

generating a voltage step on V

at the first

charge of bootstrap capacitor. The voltage step and

the related speed (dV

/dt) should be limited. As a

general rule, ESR should meet the following

constraint:

ESR

BOOT

?/DIV>

Parallel combination of small ceramic and large

electrolytic capacitors is normally the best

compromise, the first acting as fast charge thank for

the gate charge only and limiting the dV

/dt by

reducing the equivalent resistance while the second

keeps the V

voltage drop inside the desired V

d) Bootstrap Diode

The diode must have a BV> 600V (or 1200V

depending on application) and a fast recovery time

< 100 ns) to minimize the amount of charge fed

back from the bootstrap capacitor to V

supply.

PCB LAYOUT TIPS

3.1 Distance from H to L voltage

The IR22771S/IR21771S package (wide body)

maximizes the distance between floating (from DC-

to DC+) and low voltage pins (V

). Its strongly

recommended to place components tied to floating

voltage in the respective high voltage portions of the

device (V

, V

) side.

3.2 Ground plane

Ground plane must NOT be placed under or nearby

the high voltage floating side to minimize noise

coupling.

Figure 17: antenna loops

3.3 Antenna loops and inputs

connection

Current loops behave like antennas able to receive

EM noise. In order to reduce EM coupling, loops

must be reduced as much as possible. Figure 17

shows the high side shunt loops.

Moreover it is strongly suggested to use Kelvin

connections for V

in+

and V

in-

to shunt paths and star-

connect V

to V

in-

close to the shunt resistor as

explained in Fig. 18.

Figure 18: Recommended shunt connection

3.4 Supply capacitors

The supply capacitors must be placed as close as

possible to the device pins (V

and V

for the

ground tied supply, V

and V

for the floating

supply) in order to minimize parasitic traces

inductance/resistance.

Vin-

Vin+

Vin-

Vin+

Antenna

Loop

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